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<title>Static Call Graph - [STM32_NF\STM32_NF.axf]</title></head>
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<H1>Static Call Graph for image STM32_NF\STM32_NF.axf</H1><HR>
<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060960: Last Updated: Sat Aug 24 15:46:15 2024
<BR><P>
<H3>Maximum Stack Usage =        248 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
Call chain for Maximum Stack Depth:</H3>
main_thread_entry &rArr; $Super$$main &rArr; startup_thread &rArr; rt_thread_create &rArr; rt_object_allocate &rArr; rt_malloc &rArr; rt_sem_take &rArr; rt_ipc_list_suspend &rArr; rt_thread_suspend &rArr; rt_timer_stop &rArr; _rt_timer_remove
<P>
<H3>
Mutually Recursive functions
</H3> <LI><a href="#[1c]">ADC1_2_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1c]">ADC1_2_IRQHandler</a><BR>
 <LI><a href="#[4]">BusFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[4]">BusFault_Handler</a><BR>
 <LI><a href="#[3]">MemManage_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[3]">MemManage_Handler</a><BR>
 <LI><a href="#[1]">NMI_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1]">NMI_Handler</a><BR>
 <LI><a href="#[5]">UsageFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[5]">UsageFault_Handler</a><BR>
 <LI><a href="#[49]">rt_thread_idle_entry</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[49]">rt_thread_idle_entry</a><BR>
</UL>
<P>
<H3>
Function Pointers
</H3><UL>
 <LI><a href="#[1c]">ADC1_2_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[4]">BusFault_Handler</a> from stm32f1xx_it.o(i.BusFault_Handler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[1f]">CAN1_RX1_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[20]">CAN1_SCE_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[41]">CI24R1_RX_Mode</a> from ci24r1.o(i.CI24R1_RX_Mode) referenced from ci24r1.o(i.nf_Setup_Ci24R1_noname_f)
 <LI><a href="#[43]">CI24R1_RxPacket</a> from ci24r1.o(i.CI24R1_RxPacket) referenced from ci24r1.o(i.nf_Setup_Ci24R1_noname_f)
 <LI><a href="#[40]">CI24R1_TX_Mode</a> from ci24r1.o(i.CI24R1_TX_Mode) referenced from ci24r1.o(i.nf_Setup_Ci24R1_noname_f)
 <LI><a href="#[42]">CI24R1_TxPacket</a> from ci24r1.o(i.CI24R1_TxPacket) referenced from ci24r1.o(i.nf_Setup_Ci24R1_noname_f)
 <LI><a href="#[44]">Ci24R1_IRQ_Manage</a> from ci24r1.o(i.Ci24R1_IRQ_Manage) referenced from ci24r1.o(i.nf_Setup_Ci24R1_noname_f)
 <LI><a href="#[15]">DMA1_Channel1_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[16]">DMA1_Channel2_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[17]">DMA1_Channel3_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[18]">DMA1_Channel4_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[19]">DMA1_Channel5_IRQHandler</a> from stm32f1xx_it.o(i.DMA1_Channel5_IRQHandler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[1a]">DMA1_Channel6_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[1b]">DMA1_Channel7_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[7]">DebugMon_Handler</a> from stm32f1xx_it.o(i.DebugMon_Handler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[10]">EXTI0_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[32]">EXTI15_10_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[11]">EXTI1_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[12]">EXTI2_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[13]">EXTI3_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[14]">EXTI4_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[21]">EXTI9_5_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[e]">FLASH_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[3b]">Get_SW_Key_Pin</a> from switch.o(i.Get_SW_Key_Pin) referenced from switch.o(i.Switch_Init)
 <LI><a href="#[2]">HardFault_Handler</a> from context_rvds.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[2a]">I2C1_ER_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[29]">I2C1_EV_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[2c]">I2C2_ER_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[2b]">I2C2_EV_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[4a]">LED_thread_entry</a> from startup_thread.o(i.LED_thread_entry) referenced from startup_thread.o(i.startup_thread)
 <LI><a href="#[3]">MemManage_Handler</a> from stm32f1xx_it.o(i.MemManage_Handler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[1]">NMI_Handler</a> from stm32f1xx_it.o(i.NMI_Handler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[b]">PVD_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[8]">PendSV_Handler</a> from context_rvds.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[f]">RCC_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[33]">RTC_Alarm_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[d]">RTC_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[0]">Reset_Handler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[2d]">SPI1_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[2e]">SPI2_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[3a]">SPI_DMAError</a> from stm32f1xx_hal_spi.o(i.SPI_DMAError) referenced from stm32f1xx_hal_spi.o(i.HAL_SPI_Transmit_DMA)
 <LI><a href="#[38]">SPI_DMAHalfTransmitCplt</a> from stm32f1xx_hal_spi.o(i.SPI_DMAHalfTransmitCplt) referenced from stm32f1xx_hal_spi.o(i.HAL_SPI_Transmit_DMA)
 <LI><a href="#[39]">SPI_DMATransmitCplt</a> from stm32f1xx_hal_spi.o(i.SPI_DMATransmitCplt) referenced from stm32f1xx_hal_spi.o(i.HAL_SPI_Transmit_DMA)
 <LI><a href="#[6]">SVC_Handler</a> from stm32f1xx_it.o(i.SVC_Handler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[3d]">SW_Down</a> from switch.o(i.SW_Down) referenced from switch.o(i.Switch_Init)
 <LI><a href="#[3c]">SW_UP</a> from switch.o(i.SW_UP) referenced from switch.o(i.Switch_Init)
 <LI><a href="#[4d]">SW_thread_entry</a> from switch.o(i.SW_thread_entry) referenced from startup_thread.o(i.startup_thread)
 <LI><a href="#[9]">SysTick_Handler</a> from stm32f1xx_it.o(i.SysTick_Handler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[36]">SystemInit</a> from system_stm32f1xx.o(i.SystemInit) referenced from startup_stm32f103xb.o(.text)
 <LI><a href="#[c]">TAMPER_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[47]">TA_Pares</a> from nf_thread.o(i.TA_Pares) referenced from nf_thread.o(i.nf_thread_entry)
 <LI><a href="#[22]">TIM1_BRK_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[25]">TIM1_CC_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[24]">TIM1_TRG_COM_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[23]">TIM1_UP_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[26]">TIM2_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[27]">TIM3_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[28]">TIM4_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[2f]">USART1_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[30]">USART2_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[31]">USART3_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[34]">USBWakeUp_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[1d]">USB_HP_CAN1_TX_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[1e]">USB_LP_CAN1_RX0_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[5]">UsageFault_Handler</a> from stm32f1xx_it.o(i.UsageFault_Handler) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[4c]">WS2812_thread_entry</a> from ws2812_thread.o(i.WS2812_thread_entry) referenced from startup_thread.o(i.startup_thread)
 <LI><a href="#[a]">WWDG_IRQHandler</a> from startup_stm32f103xb.o(.text) referenced from startup_stm32f103xb.o(RESET)
 <LI><a href="#[37]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_stm32f103xb.o(.text)
 <LI><a href="#[35]">main</a> from components.o(i.$Sub$$main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
 <LI><a href="#[48]">main_thread_entry</a> from components.o(i.main_thread_entry) referenced from components.o(i.rt_application_init)
 <LI><a href="#[46]">nf_4wire_hw_spi</a> from nf_thread.o(i.nf_4wire_hw_spi) referenced from nf_thread.o(i.nf_thread_entry)
 <LI><a href="#[45]">nf_gpio_and_delay</a> from nf_thread.o(i.nf_gpio_and_delay) referenced from nf_thread.o(i.nf_thread_entry)
 <LI><a href="#[4b]">nf_thread_entry</a> from nf_thread.o(i.nf_thread_entry) referenced from startup_thread.o(i.startup_thread)
 <LI><a href="#[3e]">rt_thread_exit</a> from thread.o(i.rt_thread_exit) referenced from thread.o(i._rt_thread_init)
 <LI><a href="#[49]">rt_thread_idle_entry</a> from idle.o(i.rt_thread_idle_entry) referenced from idle.o(i.rt_thread_idle_init)
 <LI><a href="#[3f]">rt_thread_timeout</a> from thread.o(i.rt_thread_timeout) referenced from thread.o(i._rt_thread_init)
 <LI><a href="#[50]">rti_board_end</a> from components.o(i.rti_board_end) referenced from components.o(.rti_fn.1.end)
 <LI><a href="#[4f]">rti_board_start</a> from components.o(i.rti_board_start) referenced from components.o(.rti_fn.0.end)
 <LI><a href="#[51]">rti_end</a> from components.o(i.rti_end) referenced from components.o(.rti_fn.6.end)
 <LI><a href="#[4e]">rti_start</a> from components.o(i.rti_start) referenced from components.o(.rti_fn.0)
</UL>
<P>
<H3>
Global Symbols
</H3>
<P><STRONG><a name="[37]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(.text)
</UL>
<P><STRONG><a name="[111]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))

<P><STRONG><a name="[52]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Calls]<UL><LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>

<P><STRONG><a name="[66]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Called By]<UL><LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>

<P><STRONG><a name="[112]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))

<P><STRONG><a name="[113]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))

<P><STRONG><a name="[114]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))

<P><STRONG><a name="[115]"></a>__rt_lib_shutdown_fini</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry12b.o(.ARM.Collect$$$$0000000E))

<P><STRONG><a name="[116]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000F))

<P><STRONG><a name="[117]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$00000011))

<P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1c]"></a>ADC1_2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_2_IRQHandler
</UL>
<BR>[Called By]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_2_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1f]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[20]"></a>CAN1_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[15]"></a>DMA1_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[16]"></a>DMA1_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[17]"></a>DMA1_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[18]"></a>DMA1_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1a]"></a>DMA1_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1b]"></a>DMA1_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[10]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[32]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[11]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[12]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[13]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[14]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[21]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[e]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[2a]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[29]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[2c]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[2b]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[b]"></a>PVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[f]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[33]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[d]"></a>RTC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[2d]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[2e]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[c]"></a>TAMPER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[22]"></a>TIM1_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[25]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[24]"></a>TIM1_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[23]"></a>TIM1_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[26]"></a>TIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[27]"></a>TIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[28]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[2f]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[30]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[31]"></a>USART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[34]"></a>USBWakeUp_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1d]"></a>USB_HP_CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[1e]"></a>USB_LP_CAN1_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[a]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f103xb.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[c4]"></a>rt_hw_interrupt_disable</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, context_rvds.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_release
<LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_mq_recv
<LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_interrupt_leave
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_interrupt_enter
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_start
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_control
<LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_suspend
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_resume
<LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule
<LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_init
<LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_detach
<LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_allocate
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_take
<LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_delete
<LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_idle_excute
<LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rtthread_startup
<LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_check
<LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_yield
<LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_stop
<LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_detach
<LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_sleep
<LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_exit
<LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_thread_cleanup_execute
<LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule_remove_thread
<LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule_insert_thread
<LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_exit_critical
<LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_enter_critical
</UL>

<P><STRONG><a name="[c5]"></a>rt_hw_interrupt_enable</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, context_rvds.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_release
<LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_mq_recv
<LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_interrupt_leave
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_interrupt_enter
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_start
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_control
<LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_suspend
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_resume
<LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule
<LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_init
<LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_detach
<LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_allocate
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_take
<LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_delete
<LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_idle_excute
<LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_check
<LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_yield
<LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_stop
<LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_detach
<LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_sleep
<LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_exit
<LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_thread_cleanup_execute
<LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule_remove_thread
<LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule_insert_thread
<LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_exit_critical
<LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_enter_critical
</UL>

<P><STRONG><a name="[f8]"></a>rt_hw_context_switch</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, context_rvds.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule
</UL>

<P><STRONG><a name="[f7]"></a>rt_hw_context_switch_interrupt</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, context_rvds.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule
</UL>

<P><STRONG><a name="[8]"></a>PendSV_Handler</STRONG> (Thumb, 60 bytes, Stack size 0 bytes, context_rvds.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[fd]"></a>rt_hw_context_switch_to</STRONG> (Thumb, 56 bytes, Stack size 0 bytes, context_rvds.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_system_scheduler_start
</UL>

<P><STRONG><a name="[118]"></a>rt_hw_interrupt_thread_switch</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, context_rvds.o(.text), UNUSED)

<P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 52 bytes, Stack size 0 bytes, context_rvds.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HardFault_Handler &rArr; rt_hw_hard_fault_exception
</UL>
<BR>[Calls]<UL><LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_hard_fault_exception
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[64]"></a>__aeabi_llsr</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, llushr.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2uiz
<LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
</UL>

<P><STRONG><a name="[119]"></a>_ll_ushift_r</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llushr.o(.text), UNUSED)

<P><STRONG><a name="[11a]"></a>__aeabi_memcpy</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)

<P><STRONG><a name="[a3]"></a>__aeabi_memcpy4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NF_TX_Model_Config
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NF_RX_Model_Config
</UL>

<P><STRONG><a name="[11b]"></a>__aeabi_memcpy8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)

<P><STRONG><a name="[56]"></a>__aeabi_memset</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_memset$wrapper
<LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
</UL>

<P><STRONG><a name="[11c]"></a>__aeabi_memset4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

<P><STRONG><a name="[11d]"></a>__aeabi_memset8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

<P><STRONG><a name="[55]"></a>__aeabi_memclr</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
</UL>

<P><STRONG><a name="[b8]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[11e]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

<P><STRONG><a name="[57]"></a>_memset$wrapper</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, memseta.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
</UL>

<P><STRONG><a name="[58]"></a>__aeabi_fadd</STRONG> (Thumb, 164 bytes, Stack size 16 bytes, fadd.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = __aeabi_fadd &rArr; _float_epilogue
</UL>
<BR>[Calls]<UL><LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_float_round
<LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_float_epilogue
</UL>
<BR>[Called By]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_fsub
<LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Breathe_Color
<LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_frsub
</UL>

<P><STRONG><a name="[5b]"></a>__aeabi_fsub</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, fadd.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = __aeabi_fsub &rArr; __aeabi_fadd &rArr; _float_epilogue
</UL>
<BR>[Calls]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_fadd
</UL>
<BR>[Called By]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Breathe_Color
</UL>

<P><STRONG><a name="[5c]"></a>__aeabi_frsub</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, fadd.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_fadd
</UL>

<P><STRONG><a name="[5d]"></a>__aeabi_dmul</STRONG> (Thumb, 228 bytes, Stack size 48 bytes, dmul.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
</UL>
<BR>[Calls]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
</UL>
<BR>[Called By]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Breathe_Color
</UL>

<P><STRONG><a name="[5f]"></a>__aeabi_ddiv</STRONG> (Thumb, 222 bytes, Stack size 32 bytes, ddiv.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = __aeabi_ddiv &rArr; _double_round
</UL>
<BR>[Calls]<UL><LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
</UL>
<BR>[Called By]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Breathe_Color
</UL>

<P><STRONG><a name="[61]"></a>__aeabi_ui2f</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, ffltui.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = __aeabi_ui2f &rArr; _float_epilogue
</UL>
<BR>[Calls]<UL><LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_float_epilogue
</UL>
<BR>[Called By]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Breathe_Color
</UL>

<P><STRONG><a name="[62]"></a>__aeabi_ui2d</STRONG> (Thumb, 26 bytes, Stack size 16 bytes, dfltui.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = __aeabi_ui2d &rArr; _double_epilogue &rArr; _double_round
</UL>
<BR>[Calls]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
</UL>
<BR>[Called By]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Breathe_Color
</UL>

<P><STRONG><a name="[63]"></a>__aeabi_d2uiz</STRONG> (Thumb, 50 bytes, Stack size 8 bytes, dfixui.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __aeabi_d2uiz
</UL>
<BR>[Calls]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
</UL>
<BR>[Called By]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Breathe_Color
</UL>

<P><STRONG><a name="[6d]"></a>__aeabi_f2d</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, f2d.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Breathe_Color
</UL>

<P><STRONG><a name="[11f]"></a>__aeabi_cfcmpeq</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, cfcmple.o(.text), UNUSED)

<P><STRONG><a name="[6c]"></a>__aeabi_cfcmple</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, cfcmple.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Breathe_Color
</UL>

<P><STRONG><a name="[6b]"></a>__aeabi_cfrcmple</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, cfrcmple.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Breathe_Color
</UL>

<P><STRONG><a name="[120]"></a>__I$use$fp</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, iusefp.o(.text), UNUSED)

<P><STRONG><a name="[5a]"></a>_float_round</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, fepilogue.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_fadd
</UL>

<P><STRONG><a name="[59]"></a>_float_epilogue</STRONG> (Thumb, 92 bytes, Stack size 4 bytes, fepilogue.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = _float_epilogue
</UL>
<BR>[Called By]<UL><LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ui2f
<LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_fadd
</UL>

<P><STRONG><a name="[60]"></a>_double_round</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, depilogue.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _double_round
</UL>
<BR>[Called By]<UL><LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
<LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
</UL>

<P><STRONG><a name="[5e]"></a>_double_epilogue</STRONG> (Thumb, 156 bytes, Stack size 32 bytes, depilogue.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = _double_epilogue &rArr; _double_round
</UL>
<BR>[Calls]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
<LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
<LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
</UL>
<BR>[Called By]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ui2d
<LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
</UL>

<P><STRONG><a name="[53]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
</UL>
<BR>[Called By]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
</UL>

<P><STRONG><a name="[121]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)

<P><STRONG><a name="[65]"></a>__aeabi_llsl</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, llshl.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
</UL>

<P><STRONG><a name="[122]"></a>_ll_shift_l</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llshl.o(.text), UNUSED)

<P><STRONG><a name="[35]"></a>main</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, components.o(i.$Sub$$main))
<BR><BR>[Stack]<UL><LI>Max Depth = 232<LI>Call Chain = main &rArr; rtthread_startup &rArr; rt_application_init &rArr; rt_thread_create &rArr; rt_object_allocate &rArr; rt_malloc &rArr; rt_sem_take &rArr; rt_ipc_list_suspend &rArr; rt_thread_suspend &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rtthread_startup
</UL>
<BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
</UL>
<P><STRONG><a name="[7d]"></a>Auto_OpenDoor</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, switch.o(i.Auto_OpenDoor))
<BR><BR>[Called By]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dog_Process
</UL>

<P><STRONG><a name="[68]"></a>Blink_Color</STRONG> (Thumb, 78 bytes, Stack size 16 bytes, ws2812_thread.o(i.Blink_Color))
<BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = Blink_Color &rArr; Set_Light_Color &rArr; LED_Load &rArr; HAL_SPI_Transmit_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Set_Light_Color
</UL>
<BR>[Called By]<UL><LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WS2812_thread_entry
</UL>

<P><STRONG><a name="[ba]"></a>Blink_Init</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, ws2812_thread.o(i.Blink_Init))
<BR><BR>[Called By]<UL><LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WS2812_thread_entry
</UL>

<P><STRONG><a name="[6a]"></a>Breathe_Color</STRONG> (Thumb, 176 bytes, Stack size 32 bytes, ws2812_thread.o(i.Breathe_Color))
<BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = Breathe_Color &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
</UL>
<BR>[Calls]<UL><LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ui2f
<LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ui2d
<LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_fsub
<LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_fadd
<LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_f2d
<LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
<LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
<LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2uiz
<LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_cfrcmple
<LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_cfcmple
<LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Set_Light_Color
</UL>
<BR>[Called By]<UL><LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WS2812_thread_entry
</UL>

<P><STRONG><a name="[b9]"></a>Breathe_Init</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, ws2812_thread.o(i.Breathe_Init))
<BR><BR>[Called By]<UL><LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WS2812_thread_entry
</UL>

<P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_it.o(i.BusFault_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[6e]"></a>CI24R1_Init</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, ci24r1.o(i.CI24R1_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = CI24R1_Init &rArr; CI24R1_Write_command
</UL>
<BR>[Calls]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_command
</UL>
<BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_Setup_Ci24R1_noname_f
</UL>

<P><STRONG><a name="[41]"></a>CI24R1_RX_Mode</STRONG> (Thumb, 294 bytes, Stack size 16 bytes, ci24r1.o(i.CI24R1_RX_Mode))
<BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = CI24R1_RX_Mode &rArr; CI24R1_Write_Buf &rArr; malloc
</UL>
<BR>[Calls]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_command
<LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_Reg
<LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_Buf
</UL>
<BR>[Address Reference Count : 1]<UL><LI> ci24r1.o(i.nf_Setup_Ci24R1_noname_f)
</UL>
<P><STRONG><a name="[72]"></a>CI24R1_Read_Buf</STRONG> (Thumb, 110 bytes, Stack size 56 bytes, ci24r1.o(i.CI24R1_Read_Buf))
<BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = CI24R1_Read_Buf &rArr; malloc
</UL>
<BR>[Calls]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;malloc
<LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
</UL>
<BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Ci24R1_Check
<LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_RxPacket
</UL>

<P><STRONG><a name="[76]"></a>CI24R1_Read_Reg</STRONG> (Thumb, 82 bytes, Stack size 40 bytes, ci24r1.o(i.CI24R1_Read_Reg))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = CI24R1_Read_Reg
</UL>
<BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ReadRSSI
<LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_TxPacket
<LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_RxPacket
</UL>

<P><STRONG><a name="[43]"></a>CI24R1_RxPacket</STRONG> (Thumb, 184 bytes, Stack size 40 bytes, ci24r1.o(i.CI24R1_RxPacket))
<BR><BR>[Stack]<UL><LI>Max Depth = 116<LI>Call Chain = CI24R1_RxPacket &rArr; CI24R1_Read_Buf &rArr; malloc
</UL>
<BR>[Calls]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_ReadPin
<LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_command
<LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_Reg
<LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Read_Reg
<LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Read_Buf
</UL>
<BR>[Address Reference Count : 1]<UL><LI> ci24r1.o(i.nf_Setup_Ci24R1_noname_f)
</UL>
<P><STRONG><a name="[40]"></a>CI24R1_TX_Mode</STRONG> (Thumb, 196 bytes, Stack size 16 bytes, ci24r1.o(i.CI24R1_TX_Mode))
<BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = CI24R1_TX_Mode &rArr; CI24R1_Write_Buf &rArr; malloc
</UL>
<BR>[Calls]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_command
<LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_Reg
<LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_Buf
</UL>
<BR>[Address Reference Count : 1]<UL><LI> ci24r1.o(i.nf_Setup_Ci24R1_noname_f)
</UL>
<P><STRONG><a name="[42]"></a>CI24R1_TxPacket</STRONG> (Thumb, 204 bytes, Stack size 32 bytes, ci24r1.o(i.CI24R1_TxPacket))
<BR><BR>[Stack]<UL><LI>Max Depth = 108<LI>Call Chain = CI24R1_TxPacket &rArr; CI24R1_Write_Data &rArr; malloc
</UL>
<BR>[Calls]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_ReadPin
<LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_command
<LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_Reg
<LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_Data
<LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Read_Reg
</UL>
<BR>[Address Reference Count : 1]<UL><LI> ci24r1.o(i.nf_Setup_Ci24R1_noname_f)
</UL>
<P><STRONG><a name="[70]"></a>CI24R1_Write_Buf</STRONG> (Thumb, 112 bytes, Stack size 56 bytes, ci24r1.o(i.CI24R1_Write_Buf))
<BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = CI24R1_Write_Buf &rArr; malloc
</UL>
<BR>[Calls]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;malloc
<LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
</UL>
<BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Ci24R1_Check
<LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_TX_Mode
<LI><a href="#[41]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_RX_Mode
</UL>

<P><STRONG><a name="[77]"></a>CI24R1_Write_Data</STRONG> (Thumb, 110 bytes, Stack size 56 bytes, ci24r1.o(i.CI24R1_Write_Data))
<BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = CI24R1_Write_Data &rArr; malloc
</UL>
<BR>[Calls]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;malloc
<LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
</UL>
<BR>[Called By]<UL><LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_TxPacket
</UL>

<P><STRONG><a name="[71]"></a>CI24R1_Write_Reg</STRONG> (Thumb, 84 bytes, Stack size 40 bytes, ci24r1.o(i.CI24R1_Write_Reg))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = CI24R1_Write_Reg
</UL>
<BR>[Called By]<UL><LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_TxPacket
<LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_TX_Mode
<LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_RxPacket
<LI><a href="#[41]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_RX_Mode
</UL>

<P><STRONG><a name="[6f]"></a>CI24R1_Write_command</STRONG> (Thumb, 76 bytes, Stack size 40 bytes, ci24r1.o(i.CI24R1_Write_command))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = CI24R1_Write_command
</UL>
<BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_Setup_Ci24R1_noname_f
<LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Ci24R1_Check
<LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_TxPacket
<LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_TX_Mode
<LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_RxPacket
<LI><a href="#[41]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_RX_Mode
<LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Init
</UL>

<P><STRONG><a name="[ac]"></a>Change_Door</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, switch.o(i.Change_Door))
<BR><BR>[Called By]<UL><LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SW_Down
</UL>

<P><STRONG><a name="[78]"></a>Ci24R1_Check</STRONG> (Thumb, 84 bytes, Stack size 24 bytes, ci24r1.o(i.Ci24R1_Check))
<BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = Ci24R1_Check &rArr; CI24R1_Write_Buf &rArr; malloc
</UL>
<BR>[Calls]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_command
<LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_Buf
<LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Read_Buf
</UL>
<BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_Setup_Ci24R1_noname_f
</UL>

<P><STRONG><a name="[44]"></a>Ci24R1_IRQ_Manage</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, ci24r1.o(i.Ci24R1_IRQ_Manage))
<BR>[Address Reference Count : 1]<UL><LI> ci24r1.o(i.nf_Setup_Ci24R1_noname_f)
</UL>
<P><STRONG><a name="[19]"></a>DMA1_Channel5_IRQHandler</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f1xx_it.o(i.DMA1_Channel5_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = DMA1_Channel5_IRQHandler &rArr; HAL_DMA_IRQHandler
</UL>
<BR>[Calls]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[7]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_it.o(i.DebugMon_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[7a]"></a>DisableControl_door</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, switch.o(i.DisableControl_door))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = DisableControl_door
</UL>
<BR>[Calls]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
</UL>
<BR>[Called By]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Door_Process
</UL>

<P><STRONG><a name="[7c]"></a>Dog_Process</STRONG> (Thumb, 50 bytes, Stack size 8 bytes, switch.o(i.Dog_Process))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = Dog_Process
</UL>
<BR>[Calls]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Auto_OpenDoor
</UL>
<BR>[Called By]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SW_thread_entry
</UL>

<P><STRONG><a name="[d1]"></a>Dog_Recive</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, switch.o(i.Dog_Recive))
<BR><BR>[Called By]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_thread_entry
</UL>

<P><STRONG><a name="[7e]"></a>Door_Process</STRONG> (Thumb, 70 bytes, Stack size 24 bytes, switch.o(i.Door_Process))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = Door_Process &rArr; DisableControl_door
</UL>
<BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EnableControl_door
<LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DisableControl_door
</UL>
<BR>[Called By]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SW_thread_entry
</UL>

<P><STRONG><a name="[7f]"></a>EnableControl_door</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, switch.o(i.EnableControl_door))
<BR><BR>[Calls]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
</UL>
<BR>[Called By]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Door_Process
</UL>

<P><STRONG><a name="[92]"></a>Error_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, main.o(i.Error_Handler))
<BR><BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI2_Init
<LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI1_Init
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[b0]"></a>GetDoor_Status</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, switch.o(i.GetDoor_Status))
<BR><BR>[Called By]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SW_thread_entry
</UL>

<P><STRONG><a name="[3b]"></a>Get_SW_Key_Pin</STRONG> (Thumb, 132 bytes, Stack size 8 bytes, switch.o(i.Get_SW_Key_Pin))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = Get_SW_Key_Pin
</UL>
<BR>[Calls]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_ReadPin
</UL>
<BR>[Address Reference Count : 1]<UL><LI> switch.o(i.Switch_Init)
</UL>
<P><STRONG><a name="[bb]"></a>GlitchFilter_Value</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, glitchfilter.o(i.GlitchFilter_Value))
<BR><BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ZY_Button_Process
</UL>

<P><STRONG><a name="[79]"></a>HAL_DMA_IRQHandler</STRONG> (Thumb, 336 bytes, Stack size 40 bytes, stm32f1xx_hal_dma.o(i.HAL_DMA_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_DMA_IRQHandler
</UL>
<BR>[Called By]<UL><LI><a href="#[19]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel5_IRQHandler
</UL>

<P><STRONG><a name="[91]"></a>HAL_DMA_Init</STRONG> (Thumb, 90 bytes, Stack size 12 bytes, stm32f1xx_hal_dma.o(i.HAL_DMA_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = HAL_DMA_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
</UL>

<P><STRONG><a name="[80]"></a>HAL_DMA_Start_IT</STRONG> (Thumb, 116 bytes, Stack size 16 bytes, stm32f1xx_hal_dma.o(i.HAL_DMA_Start_IT))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit_DMA
</UL>

<P><STRONG><a name="[90]"></a>HAL_GPIO_Init</STRONG> (Thumb, 464 bytes, Stack size 40 bytes, stm32f1xx_hal_gpio.o(i.HAL_GPIO_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_GPIO_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
<LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IRQ_GPIO_Input
</UL>

<P><STRONG><a name="[75]"></a>HAL_GPIO_ReadPin</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, stm32f1xx_hal_gpio.o(i.HAL_GPIO_ReadPin))
<BR><BR>[Called By]<UL><LI><a href="#[3b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Get_SW_Key_Pin
<LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_TxPacket
<LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_RxPacket
</UL>

<P><STRONG><a name="[7b]"></a>HAL_GPIO_WritePin</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, stm32f1xx_hal_gpio.o(i.HAL_GPIO_WritePin))
<BR><BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;EnableControl_door
<LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DisableControl_door
<LI><a href="#[45]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_gpio_and_delay
<LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TA_Pares
<LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_thread_entry
<LI><a href="#[4a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LED_thread_entry
</UL>

<P><STRONG><a name="[8a]"></a>HAL_GetTick</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f1xx_hal.o(i.HAL_GetTick))
<BR><BR>[Called By]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit
<LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Receive
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WaitFlagStateUntilTimeout
<LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitCplt
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
<LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
</UL>

<P><STRONG><a name="[b6]"></a>HAL_IncTick</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32f1xx_hal.o(i.HAL_IncTick))
<BR><BR>[Called By]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>

<P><STRONG><a name="[82]"></a>HAL_Init</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, stm32f1xx_hal.o(i.HAL_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_Init &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_MspInit
<LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriorityGrouping
</UL>
<BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;$Super$$main
</UL>

<P><STRONG><a name="[84]"></a>HAL_InitTick</STRONG> (Thumb, 58 bytes, Stack size 16 bytes, stm32f1xx_hal.o(i.HAL_InitTick))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = HAL_InitTick &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SYSTICK_Config
</UL>
<BR>[Called By]<UL><LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
</UL>

<P><STRONG><a name="[85]"></a>HAL_MspInit</STRONG> (Thumb, 52 bytes, Stack size 8 bytes, stm32f1xx_hal_msp.o(i.HAL_MspInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_MspInit
</UL>
<BR>[Called By]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
</UL>

<P><STRONG><a name="[9d]"></a>HAL_NVIC_EnableIRQ</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f1xx_hal_cortex.o(i.HAL_NVIC_EnableIRQ))
<BR><BR>[Called By]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
</UL>

<P><STRONG><a name="[87]"></a>HAL_NVIC_SetPriority</STRONG> (Thumb, 60 bytes, Stack size 16 bytes, stm32f1xx_hal_cortex.o(i.HAL_NVIC_SetPriority))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
<LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
</UL>

<P><STRONG><a name="[83]"></a>HAL_NVIC_SetPriorityGrouping</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f1xx_hal_cortex.o(i.HAL_NVIC_SetPriorityGrouping))
<BR><BR>[Called By]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
</UL>

<P><STRONG><a name="[89]"></a>HAL_RCC_ClockConfig</STRONG> (Thumb, 318 bytes, Stack size 32 bytes, stm32f1xx_hal_rcc.o(i.HAL_RCC_ClockConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = HAL_RCC_ClockConfig &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
<LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[8b]"></a>HAL_RCC_GetSysClockFreq</STRONG> (Thumb, 64 bytes, Stack size 0 bytes, stm32f1xx_hal_rcc.o(i.HAL_RCC_GetSysClockFreq))
<BR><BR>[Called By]<UL><LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
</UL>

<P><STRONG><a name="[8c]"></a>HAL_RCC_OscConfig</STRONG> (Thumb, 882 bytes, Stack size 40 bytes, stm32f1xx_hal_rcc.o(i.HAL_RCC_OscConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = HAL_RCC_OscConfig &rArr; RCC_Delay
</UL>
<BR>[Calls]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_Delay
</UL>
<BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[a8]"></a>HAL_SPI_ErrorCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_hal_spi.o(i.HAL_SPI_ErrorCallback))
<BR><BR>[Called By]<UL><LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitCplt
<LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAError
</UL>

<P><STRONG><a name="[8e]"></a>HAL_SPI_Init</STRONG> (Thumb, 180 bytes, Stack size 16 bytes, stm32f1xx_hal_spi.o(i.HAL_SPI_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = HAL_SPI_Init &rArr; HAL_SPI_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI2_Init
<LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI1_Init
</UL>

<P><STRONG><a name="[8f]"></a>HAL_SPI_MspInit</STRONG> (Thumb, 218 bytes, Stack size 40 bytes, spi.o(i.HAL_SPI_MspInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = HAL_SPI_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Init
<LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
<LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Init
<LI><a href="#[45]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_gpio_and_delay
</UL>

<P><STRONG><a name="[93]"></a>HAL_SPI_Receive</STRONG> (Thumb, 346 bytes, Stack size 40 bytes, stm32f1xx_hal_spi.o(i.HAL_SPI_Receive))
<BR><BR>[Stack]<UL><LI>Max Depth = 152<LI>Call Chain = HAL_SPI_Receive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTransaction
</UL>
<BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_4wire_hw_spi
</UL>

<P><STRONG><a name="[96]"></a>HAL_SPI_Transmit</STRONG> (Thumb, 402 bytes, Stack size 40 bytes, stm32f1xx_hal_spi.o(i.HAL_SPI_Transmit))
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
</UL>
<BR>[Called By]<UL><LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_4wire_hw_spi
</UL>

<P><STRONG><a name="[94]"></a>HAL_SPI_TransmitReceive</STRONG> (Thumb, 506 bytes, Stack size 56 bytes, stm32f1xx_hal_spi.o(i.HAL_SPI_TransmitReceive))
<BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
</UL>
<BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Receive
<LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_4wire_hw_spi
</UL>

<P><STRONG><a name="[98]"></a>HAL_SPI_Transmit_DMA</STRONG> (Thumb, 196 bytes, Stack size 16 bytes, stm32f1xx_hal_spi.o(i.HAL_SPI_Transmit_DMA))
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = HAL_SPI_Transmit_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
</UL>
<BR>[Called By]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LED_Load
</UL>

<P><STRONG><a name="[aa]"></a>HAL_SPI_TxCpltCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_hal_spi.o(i.HAL_SPI_TxCpltCallback))
<BR><BR>[Called By]<UL><LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitCplt
</UL>

<P><STRONG><a name="[a9]"></a>HAL_SPI_TxHalfCpltCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_hal_spi.o(i.HAL_SPI_TxHalfCpltCallback))
<BR><BR>[Called By]<UL><LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMAHalfTransmitCplt
</UL>

<P><STRONG><a name="[86]"></a>HAL_SYSTICK_Config</STRONG> (Thumb, 40 bytes, Stack size 8 bytes, stm32f1xx_hal_cortex.o(i.HAL_SYSTICK_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_SYSTICK_Config
</UL>
<BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
</UL>

<P><STRONG><a name="[99]"></a>IRQ_GPIO_Input</STRONG> (Thumb, 50 bytes, Stack size 24 bytes, nf_thread.o(i.IRQ_GPIO_Input))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = IRQ_GPIO_Input &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[45]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_gpio_and_delay
</UL>

<P><STRONG><a name="[9a]"></a>LED_Load</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, ws2812_thread.o(i.LED_Load))
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = LED_Load &rArr; HAL_SPI_Transmit_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit_DMA
</UL>
<BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Set_Light_Color
<LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WS2812_thread_entry
</UL>

<P><STRONG><a name="[4a]"></a>LED_thread_entry</STRONG> (Thumb, 52 bytes, Stack size 0 bytes, startup_thread.o(i.LED_thread_entry))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = LED_thread_entry &rArr; rt_thread_mdelay &rArr; rt_thread_sleep &rArr; rt_timer_start &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
<LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_mdelay
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_thread.o(i.startup_thread)
</UL>
<P><STRONG><a name="[9c]"></a>MX_DMA_Init</STRONG> (Thumb, 40 bytes, Stack size 8 bytes, dma.o(i.MX_DMA_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = MX_DMA_Init &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
</UL>
<BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;$Super$$main
</UL>

<P><STRONG><a name="[9e]"></a>MX_GPIO_Init</STRONG> (Thumb, 208 bytes, Stack size 48 bytes, gpio.o(i.MX_GPIO_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = MX_GPIO_Init &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
<LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;$Super$$main
</UL>

<P><STRONG><a name="[9f]"></a>MX_SPI1_Init</STRONG> (Thumb, 62 bytes, Stack size 8 bytes, spi.o(i.MX_SPI1_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = MX_SPI1_Init &rArr; HAL_SPI_Init &rArr; HAL_SPI_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Init
<LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;$Super$$main
</UL>

<P><STRONG><a name="[a0]"></a>MX_SPI2_Init</STRONG> (Thumb, 62 bytes, Stack size 8 bytes, spi.o(i.MX_SPI2_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = MX_SPI2_Init &rArr; HAL_SPI_Init &rArr; HAL_SPI_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Init
<LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;$Super$$main
</UL>

<P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_it.o(i.MemManage_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[d0]"></a>NF_RX_Data</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, nf_send.o(i.NF_RX_Data))
<BR><BR>[Called By]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_thread_entry
</UL>

<P><STRONG><a name="[a1]"></a>NF_RX_Model_Config</STRONG> (Thumb, 150 bytes, Stack size 112 bytes, nf_thread.o(i.NF_RX_Model_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = NF_RX_Model_Config &rArr; NF_Set_RX_Model
</UL>
<BR>[Calls]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mymemcpy
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NF_Set_RX_Model
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy4
</UL>
<BR>[Called By]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_thread_entry
</UL>

<P><STRONG><a name="[cf]"></a>NF_Send_Data</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, nf_send.o(i.NF_Send_Data))
<BR><BR>[Called By]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_thread_entry
</UL>

<P><STRONG><a name="[a4]"></a>NF_Set_RX_Model</STRONG> (Thumb, 28 bytes, Stack size 24 bytes, nf_send.o(i.NF_Set_RX_Model))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = NF_Set_RX_Model
</UL>
<BR>[Calls]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mymemcpy
</UL>
<BR>[Called By]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NF_RX_Model_Config
</UL>

<P><STRONG><a name="[a5]"></a>NF_Set_TX_Model</STRONG> (Thumb, 62 bytes, Stack size 24 bytes, nf_send.o(i.NF_Set_TX_Model))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = NF_Set_TX_Model
</UL>
<BR>[Calls]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mymemcpy
</UL>
<BR>[Called By]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NF_TX_Model_Config
</UL>

<P><STRONG><a name="[a6]"></a>NF_TX_Model_Config</STRONG> (Thumb, 78 bytes, Stack size 104 bytes, nf_thread.o(i.NF_TX_Model_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = NF_TX_Model_Config &rArr; NF_Set_TX_Model
</UL>
<BR>[Calls]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mymemcpy
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NF_Set_TX_Model
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy4
</UL>
<BR>[Called By]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_thread_entry
</UL>

<P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_it.o(i.NMI_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[a7]"></a>ReadRSSI</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, ci24r1.o(i.ReadRSSI))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = ReadRSSI &rArr; CI24R1_Read_Reg
</UL>
<BR>[Calls]<UL><LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Read_Reg
</UL>
<BR>[Called By]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_thread_entry
</UL>

<P><STRONG><a name="[bc]"></a>Register_GlitchFilter</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, glitchfilter.o(i.Register_GlitchFilter))
<BR><BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ZY_Button_Register_f
</UL>

<P><STRONG><a name="[b1]"></a>SET_Color</STRONG> (Thumb, 100 bytes, Stack size 28 bytes, ws2812.o(i.SET_Color))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = SET_Color
</UL>
<BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Set_Light_Color
</UL>

<P><STRONG><a name="[6]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_it.o(i.SVC_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[3d]"></a>SW_Down</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, switch.o(i.SW_Down))
<BR><BR>[Calls]<UL><LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Change_Door
</UL>
<BR>[Address Reference Count : 1]<UL><LI> switch.o(i.Switch_Init)
</UL>
<P><STRONG><a name="[3c]"></a>SW_UP</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, switch.o(i.SW_UP))
<BR>[Address Reference Count : 1]<UL><LI> switch.o(i.Switch_Init)
</UL>
<P><STRONG><a name="[4d]"></a>SW_thread_entry</STRONG> (Thumb, 202 bytes, Stack size 8 bytes, switch.o(i.SW_thread_entry))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = SW_thread_entry &rArr; rt_thread_mdelay &rArr; rt_thread_sleep &rArr; rt_timer_start &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ZY_Button_Process
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Switch_Init
<LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GetDoor_Status
<LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Door_Process
<LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dog_Process
<LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Set_Light
<LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_mdelay
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_thread.o(i.startup_thread)
</UL>
<P><STRONG><a name="[af]"></a>Set_Light</STRONG> (Thumb, 24 bytes, Stack size 12 bytes, ws2812_thread.o(i.Set_Light))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = Set_Light
</UL>
<BR>[Called By]<UL><LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WS2812_thread_entry
<LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SW_thread_entry
</UL>

<P><STRONG><a name="[69]"></a>Set_Light_Color</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, ws2812_thread.o(i.Set_Light_Color))
<BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = Set_Light_Color &rArr; LED_Load &rArr; HAL_SPI_Transmit_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SET_Color
<LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LED_Load
</UL>
<BR>[Called By]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Breathe_Color
<LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Blink_Color
<LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WS2812_thread_entry
</UL>

<P><STRONG><a name="[ad]"></a>Switch_Init</STRONG> (Thumb, 218 bytes, Stack size 8 bytes, switch.o(i.Switch_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = Switch_Init &rArr; ZY_Button_Register_f
</UL>
<BR>[Calls]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ZY_Button_Register_f
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ZY_ButtonRegister_EventKeyUP
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ZY_ButtonRegister_EventKeyDown
</UL>
<BR>[Called By]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SW_thread_entry
</UL>

<P><STRONG><a name="[9]"></a>SysTick_Handler</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, stm32f1xx_it.o(i.SysTick_Handler))
<BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = SysTick_Handler &rArr; rt_os_tick_callback &rArr; rt_tick_increase &rArr; rt_timer_check &rArr; rt_timer_start &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_os_tick_callback
<LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_IncTick
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[b7]"></a>SystemClock_Config</STRONG> (Thumb, 94 bytes, Stack size 72 bytes, main.o(i.SystemClock_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = SystemClock_Config &rArr; HAL_RCC_ClockConfig &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
<LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;$Super$$main
</UL>

<P><STRONG><a name="[36]"></a>SystemInit</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, system_stm32f1xx.o(i.SystemInit))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(.text)
</UL>
<P><STRONG><a name="[cd]"></a>TA_Create</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, ta_protocol.o(i.TA_Create))
<BR><BR>[Called By]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_thread_entry
</UL>

<P><STRONG><a name="[47]"></a>TA_Pares</STRONG> (Thumb, 24 bytes, Stack size 16 bytes, nf_thread.o(i.TA_Pares))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = TA_Pares
</UL>
<BR>[Calls]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
</UL>
<BR>[Address Reference Count : 1]<UL><LI> nf_thread.o(i.nf_thread_entry)
</UL>
<P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f1xx_it.o(i.UsageFault_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f103xb.o(RESET)
</UL>
<P><STRONG><a name="[4c]"></a>WS2812_thread_entry</STRONG> (Thumb, 156 bytes, Stack size 16 bytes, ws2812_thread.o(i.WS2812_thread_entry))
<BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = WS2812_thread_entry &rArr; Breathe_Color &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
</UL>
<BR>[Calls]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Set_Light_Color
<LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Set_Light
<LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LED_Load
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Breathe_Init
<LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Breathe_Color
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Blink_Init
<LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Blink_Color
<LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_mdelay
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_thread.o(i.startup_thread)
</UL>
<P><STRONG><a name="[b4]"></a>ZY_ButtonRegister_EventKeyDown</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, zy_button.o(i.ZY_ButtonRegister_EventKeyDown))
<BR><BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Switch_Init
</UL>

<P><STRONG><a name="[b3]"></a>ZY_ButtonRegister_EventKeyUP</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, zy_button.o(i.ZY_ButtonRegister_EventKeyUP))
<BR><BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Switch_Init
</UL>

<P><STRONG><a name="[ae]"></a>ZY_Button_Process</STRONG> (Thumb, 134 bytes, Stack size 24 bytes, zy_button.o(i.ZY_Button_Process))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = ZY_Button_Process
</UL>
<BR>[Calls]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;GlitchFilter_Value
</UL>
<BR>[Called By]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SW_thread_entry
</UL>

<P><STRONG><a name="[b2]"></a>ZY_Button_Register_f</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, zy_button.o(i.ZY_Button_Register_f))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = ZY_Button_Register_f
</UL>
<BR>[Calls]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Register_GlitchFilter
</UL>
<BR>[Called By]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Switch_Init
</UL>

<P><STRONG><a name="[f6]"></a>__rt_ffs</STRONG> (Thumb, 66 bytes, Stack size 0 bytes, kservice.o(i.__rt_ffs))
<BR><BR>[Called By]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule
<LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_system_scheduler_start
</UL>

<P><STRONG><a name="[123]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)

<P><STRONG><a name="[124]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)

<P><STRONG><a name="[125]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)

<P><STRONG><a name="[74]"></a>free</STRONG> (Thumb, 76 bytes, Stack size 8 bytes, malloc.o(i.free))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = free
</UL>
<BR>[Called By]<UL><LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_Data
<LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_Buf
<LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Read_Buf
</UL>

<P><STRONG><a name="[c6]"></a>$Super$$main</STRONG> (Thumb, 52 bytes, Stack size 8 bytes, main.o(i.main))
<BR><BR>[Stack]<UL><LI>Max Depth = 240<LI>Call Chain = $Super$$main &rArr; startup_thread &rArr; rt_thread_create &rArr; rt_object_allocate &rArr; rt_malloc &rArr; rt_sem_take &rArr; rt_ipc_list_suspend &rArr; rt_thread_suspend &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;startup_thread
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;my_mem_init
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI2_Init
<LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI1_Init
<LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
<LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>
<BR>[Called By]<UL><LI><a href="#[48]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main_thread_entry
</UL>

<P><STRONG><a name="[48]"></a>main_thread_entry</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, components.o(i.main_thread_entry))
<BR><BR>[Stack]<UL><LI>Max Depth = 248<LI>Call Chain = main_thread_entry &rArr; $Super$$main &rArr; startup_thread &rArr; rt_thread_create &rArr; rt_object_allocate &rArr; rt_malloc &rArr; rt_sem_take &rArr; rt_ipc_list_suspend &rArr; rt_thread_suspend &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;$Super$$main
<LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_components_init
</UL>
<BR>[Address Reference Count : 1]<UL><LI> components.o(i.rt_application_init)
</UL>
<P><STRONG><a name="[73]"></a>malloc</STRONG> (Thumb, 92 bytes, Stack size 20 bytes, malloc.o(i.malloc))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = malloc
</UL>
<BR>[Called By]<UL><LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_Data
<LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_Buf
<LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Read_Buf
</UL>

<P><STRONG><a name="[c7]"></a>my_mem_init</STRONG> (Thumb, 46 bytes, Stack size 12 bytes, malloc.o(i.my_mem_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = my_mem_init
</UL>
<BR>[Calls]<UL><LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mymemset
</UL>
<BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;$Super$$main
</UL>

<P><STRONG><a name="[a2]"></a>mymemcpy</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, malloc.o(i.mymemcpy))
<BR><BR>[Called By]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NF_Set_TX_Model
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NF_Set_RX_Model
<LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NF_TX_Model_Config
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NF_RX_Model_Config
</UL>

<P><STRONG><a name="[ca]"></a>mymemset</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, malloc.o(i.mymemset))
<BR><BR>[Called By]<UL><LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;my_mem_init
</UL>

<P><STRONG><a name="[46]"></a>nf_4wire_hw_spi</STRONG> (Thumb, 68 bytes, Stack size 16 bytes, nf_thread.o(i.nf_4wire_hw_spi))
<BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = nf_4wire_hw_spi &rArr; HAL_SPI_Receive &rArr; HAL_SPI_TransmitReceive &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit
<LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Receive
</UL>
<BR>[Address Reference Count : 1]<UL><LI> nf_thread.o(i.nf_thread_entry)
</UL>
<P><STRONG><a name="[cb]"></a>nf_Setup_Ci24R1_noname_f</STRONG> (Thumb, 70 bytes, Stack size 16 bytes, ci24r1.o(i.nf_Setup_Ci24R1_noname_f))
<BR><BR>[Stack]<UL><LI>Max Depth = 116<LI>Call Chain = nf_Setup_Ci24R1_noname_f &rArr; Ci24R1_Check &rArr; CI24R1_Write_Buf &rArr; malloc
</UL>
<BR>[Calls]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Ci24R1_Check
<LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Write_command
<LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CI24R1_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_thread_entry
</UL>

<P><STRONG><a name="[45]"></a>nf_gpio_and_delay</STRONG> (Thumb, 72 bytes, Stack size 8 bytes, nf_thread.o(i.nf_gpio_and_delay))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = nf_gpio_and_delay &rArr; HAL_SPI_MspInit &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
<LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
<LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IRQ_GPIO_Input
<LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_mdelay
</UL>
<BR>[Address Reference Count : 1]<UL><LI> nf_thread.o(i.nf_thread_entry)
</UL>
<P><STRONG><a name="[4b]"></a>nf_thread_entry</STRONG> (Thumb, 170 bytes, Stack size 48 bytes, nf_thread.o(i.nf_thread_entry))
<BR><BR>[Stack]<UL><LI>Max Depth = 184<LI>Call Chain = nf_thread_entry &rArr; NF_RX_Model_Config &rArr; NF_Set_RX_Model
</UL>
<BR>[Calls]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
<LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_mq_recv
<LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_mq_init
<LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_Setup_Ci24R1_noname_f
<LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TA_Create
<LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ReadRSSI
<LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NF_Send_Data
<LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NF_RX_Data
<LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Dog_Recive
<LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NF_TX_Model_Config
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NF_RX_Model_Config
<LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_mdelay
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_thread.o(i.startup_thread)
</UL>
<P><STRONG><a name="[d2]"></a>rt_application_init</STRONG> (Thumb, 32 bytes, Stack size 16 bytes, components.o(i.rt_application_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 216<LI>Call Chain = rt_application_init &rArr; rt_thread_create &rArr; rt_object_allocate &rArr; rt_malloc &rArr; rt_sem_take &rArr; rt_ipc_list_suspend &rArr; rt_thread_suspend &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_startup
<LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_create
</UL>
<BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rtthread_startup
</UL>

<P><STRONG><a name="[dd]"></a>rt_components_board_init</STRONG> (Thumb, 20 bytes, Stack size 16 bytes, components.o(i.rt_components_board_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = rt_components_board_init
</UL>
<BR>[Called By]<UL><LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_board_init
</UL>

<P><STRONG><a name="[c9]"></a>rt_components_init</STRONG> (Thumb, 20 bytes, Stack size 16 bytes, components.o(i.rt_components_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = rt_components_init
</UL>
<BR>[Called By]<UL><LI><a href="#[48]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main_thread_entry
</UL>

<P><STRONG><a name="[d5]"></a>rt_enter_critical</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, scheduler.o(i.rt_enter_critical))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = rt_enter_critical
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_init
</UL>

<P><STRONG><a name="[d6]"></a>rt_exit_critical</STRONG> (Thumb, 52 bytes, Stack size 8 bytes, scheduler.o(i.rt_exit_critical))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = rt_exit_critical &rArr; rt_schedule
</UL>
<BR>[Calls]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_init
</UL>

<P><STRONG><a name="[d8]"></a>rt_free</STRONG> (Thumb, 84 bytes, Stack size 16 bytes, mem.o(i.rt_free))
<BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = rt_free &rArr; rt_sem_take &rArr; rt_ipc_list_suspend &rArr; rt_thread_suspend &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_release
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_take
<LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;plug_holes
</UL>
<BR>[Called By]<UL><LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_delete
<LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_idle_excute
</UL>

<P><STRONG><a name="[dc]"></a>rt_hw_board_init</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, board.o(i.rt_hw_board_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = rt_hw_board_init &rArr; rt_system_heap_init &rArr; rt_sem_init &rArr; rt_object_init &rArr; rt_exit_critical &rArr; rt_schedule
</UL>
<BR>[Calls]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_components_board_init
<LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_system_heap_init
</UL>
<BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rtthread_startup
</UL>

<P><STRONG><a name="[54]"></a>rt_hw_hard_fault_exception</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, cpuport.o(i.rt_hw_hard_fault_exception))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = rt_hw_hard_fault_exception
</UL>
<BR>[Called By]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
</UL>

<P><STRONG><a name="[bf]"></a>rt_hw_stack_init</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, cpuport.o(i.rt_hw_stack_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = rt_hw_stack_init
</UL>
<BR>[Called By]<UL><LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_rt_thread_init
</UL>

<P><STRONG><a name="[df]"></a>rt_interrupt_enter</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, irq.o(i.rt_interrupt_enter))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = rt_interrupt_enter
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_os_tick_callback
</UL>

<P><STRONG><a name="[e0]"></a>rt_interrupt_leave</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, irq.o(i.rt_interrupt_leave))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = rt_interrupt_leave
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_os_tick_callback
</UL>

<P><STRONG><a name="[e6]"></a>rt_malloc</STRONG> (Thumb, 252 bytes, Stack size 32 bytes, mem.o(i.rt_malloc))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = rt_malloc &rArr; rt_sem_take &rArr; rt_ipc_list_suspend &rArr; rt_thread_suspend &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_release
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_take
</UL>
<BR>[Called By]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_create
<LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_allocate
</UL>

<P><STRONG><a name="[ec]"></a>rt_memcpy</STRONG> (Thumb, 78 bytes, Stack size 12 bytes, kservice.o(i.rt_memcpy))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = rt_memcpy
</UL>
<BR>[Called By]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_mq_recv
</UL>

<P><STRONG><a name="[be]"></a>rt_memset</STRONG> (Thumb, 70 bytes, Stack size 8 bytes, kservice.o(i.rt_memset))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = rt_memset
</UL>
<BR>[Called By]<UL><LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_allocate
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_rt_thread_init
</UL>

<P><STRONG><a name="[cc]"></a>rt_mq_init</STRONG> (Thumb, 106 bytes, Stack size 24 bytes, ipc.o(i.rt_mq_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = rt_mq_init &rArr; rt_object_init &rArr; rt_exit_critical &rArr; rt_schedule
</UL>
<BR>[Calls]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_init
</UL>
<BR>[Called By]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_thread_entry
</UL>

<P><STRONG><a name="[ce]"></a>rt_mq_recv</STRONG> (Thumb, 276 bytes, Stack size 56 bytes, ipc.o(i.rt_mq_recv))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = rt_mq_recv &rArr; rt_ipc_list_suspend &rArr; rt_thread_suspend &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_start
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_control
<LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule
<LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_memcpy
<LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_list_isempty
<LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_ipc_list_suspend
<LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_ipc_list_resume
<LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_self
<LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_tick_get
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_thread_entry
</UL>

<P><STRONG><a name="[ee]"></a>rt_object_allocate</STRONG> (Thumb, 84 bytes, Stack size 24 bytes, object.o(i.rt_object_allocate))
<BR><BR>[Stack]<UL><LI>Max Depth = 152<LI>Call Chain = rt_object_allocate &rArr; rt_malloc &rArr; rt_sem_take &rArr; rt_ipc_list_suspend &rArr; rt_thread_suspend &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_strncpy
<LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_memset
<LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_malloc
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
<LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_get_information
<LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_list_insert_after
</UL>
<BR>[Called By]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_create
</UL>

<P><STRONG><a name="[f2]"></a>rt_object_delete</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, object.o(i.rt_object_delete))
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = rt_object_delete &rArr; rt_free &rArr; rt_sem_take &rArr; rt_ipc_list_suspend &rArr; rt_thread_suspend &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_free
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
<LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_list_remove
</UL>
<BR>[Called By]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_create
<LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_idle_excute
</UL>

<P><STRONG><a name="[f4]"></a>rt_object_detach</STRONG> (Thumb, 32 bytes, Stack size 16 bytes, object.o(i.rt_object_detach))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = rt_object_detach
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
<LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_list_remove
</UL>
<BR>[Called By]<UL><LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_detach
<LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_exit
</UL>

<P><STRONG><a name="[ef]"></a>rt_object_get_information</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, object.o(i.rt_object_get_information))
<BR><BR>[Called By]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_init
<LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_allocate
</UL>

<P><STRONG><a name="[e7]"></a>rt_object_init</STRONG> (Thumb, 80 bytes, Stack size 24 bytes, object.o(i.rt_object_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = rt_object_init &rArr; rt_exit_critical &rArr; rt_schedule
</UL>
<BR>[Calls]<UL><LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_strncpy
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
<LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_exit_critical
<LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_enter_critical
<LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_get_information
<LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_list_insert_after
</UL>
<BR>[Called By]<UL><LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_mq_init
<LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_init
<LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_init
<LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_init
</UL>

<P><STRONG><a name="[ff]"></a>rt_object_is_systemobject</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, object.o(i.rt_object_is_systemobject))
<BR><BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_exit
</UL>

<P><STRONG><a name="[b5]"></a>rt_os_tick_callback</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, board.o(i.rt_os_tick_callback))
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = rt_os_tick_callback &rArr; rt_tick_increase &rArr; rt_timer_check &rArr; rt_timer_start &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_interrupt_leave
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_interrupt_enter
<LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_tick_increase
</UL>
<BR>[Called By]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>

<P><STRONG><a name="[d7]"></a>rt_schedule</STRONG> (Thumb, 82 bytes, Stack size 16 bytes, scheduler.o(i.rt_schedule))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = rt_schedule
</UL>
<BR>[Calls]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_ffs
<LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_context_switch_interrupt
<LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_context_switch
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_release
<LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_mq_recv
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_startup
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_take
<LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_yield
<LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_timeout
<LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_sleep
<LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_exit
<LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_exit_critical
</UL>

<P><STRONG><a name="[f9]"></a>rt_schedule_insert_thread</STRONG> (Thumb, 68 bytes, Stack size 8 bytes, scheduler.o(i.rt_schedule_insert_thread))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = rt_schedule_insert_thread
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_resume
<LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_timeout
</UL>

<P><STRONG><a name="[fa]"></a>rt_schedule_remove_thread</STRONG> (Thumb, 74 bytes, Stack size 16 bytes, scheduler.o(i.rt_schedule_remove_thread))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = rt_schedule_remove_thread
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_suspend
<LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_exit
</UL>

<P><STRONG><a name="[fb]"></a>rt_sem_init</STRONG> (Thumb, 38 bytes, Stack size 24 bytes, ipc.o(i.rt_sem_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = rt_sem_init &rArr; rt_object_init &rArr; rt_exit_critical &rArr; rt_schedule
</UL>
<BR>[Calls]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_init
</UL>
<BR>[Called By]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_system_heap_init
</UL>

<P><STRONG><a name="[db]"></a>rt_sem_release</STRONG> (Thumb, 84 bytes, Stack size 24 bytes, ipc.o(i.rt_sem_release))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = rt_sem_release &rArr; rt_ipc_list_resume &rArr; rt_thread_resume &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule
<LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_list_isempty
<LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_ipc_list_resume
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_malloc
<LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_free
</UL>

<P><STRONG><a name="[d9]"></a>rt_sem_take</STRONG> (Thumb, 110 bytes, Stack size 24 bytes, ipc.o(i.rt_sem_take))
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = rt_sem_take &rArr; rt_ipc_list_suspend &rArr; rt_thread_suspend &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_start
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_control
<LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule
<LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_ipc_list_suspend
<LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_self
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_malloc
<LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_free
</UL>

<P><STRONG><a name="[10d]"></a>rt_show_version</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, kservice.o(i.rt_show_version))
<BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rtthread_startup
</UL>

<P><STRONG><a name="[f0]"></a>rt_strncpy</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, kservice.o(i.rt_strncpy))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = rt_strncpy
</UL>
<BR>[Called By]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_init
<LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_allocate
</UL>

<P><STRONG><a name="[de]"></a>rt_system_heap_init</STRONG> (Thumb, 82 bytes, Stack size 8 bytes, mem.o(i.rt_system_heap_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = rt_system_heap_init &rArr; rt_sem_init &rArr; rt_object_init &rArr; rt_exit_critical &rArr; rt_schedule
</UL>
<BR>[Calls]<UL><LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_init
</UL>
<BR>[Called By]<UL><LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_board_init
</UL>

<P><STRONG><a name="[10f]"></a>rt_system_scheduler_init</STRONG> (Thumb, 44 bytes, Stack size 8 bytes, scheduler.o(i.rt_system_scheduler_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = rt_system_scheduler_init
</UL>
<BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rtthread_startup
</UL>

<P><STRONG><a name="[fc]"></a>rt_system_scheduler_start</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, scheduler.o(i.rt_system_scheduler_start))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = rt_system_scheduler_start
</UL>
<BR>[Calls]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_ffs
<LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_context_switch_to
</UL>
<BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rtthread_startup
</UL>

<P><STRONG><a name="[10e]"></a>rt_system_timer_init</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, timer.o(i.rt_system_timer_init))
<BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rtthread_startup
</UL>

<P><STRONG><a name="[110]"></a>rt_system_timer_thread_init</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, timer.o(i.rt_system_timer_thread_init))
<BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rtthread_startup
</UL>

<P><STRONG><a name="[d3]"></a>rt_thread_create</STRONG> (Thumb, 76 bytes, Stack size 48 bytes, thread.o(i.rt_thread_create))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = rt_thread_create &rArr; rt_object_allocate &rArr; rt_malloc &rArr; rt_sem_take &rArr; rt_ipc_list_suspend &rArr; rt_thread_suspend &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_allocate
<LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_malloc
<LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_delete
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_rt_thread_init
</UL>
<BR>[Called By]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;startup_thread
<LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_application_init
</UL>

<P><STRONG><a name="[3e]"></a>rt_thread_exit</STRONG> (Thumb, 80 bytes, Stack size 16 bytes, thread.o(i.rt_thread_exit))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = rt_thread_exit &rArr; rt_timer_detach &rArr; rt_object_detach
</UL>
<BR>[Calls]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule
<LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_detach
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
<LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_detach
<LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_list_insert_after
<LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_thread_cleanup_execute
<LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule_remove_thread
<LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_is_systemobject
</UL>
<BR>[Address Reference Count : 1]<UL><LI> thread.o(i._rt_thread_init)
</UL>
<P><STRONG><a name="[101]"></a>rt_thread_idle_excute</STRONG> (Thumb, 80 bytes, Stack size 16 bytes, idle.o(i.rt_thread_idle_excute))
<BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = rt_thread_idle_excute &rArr; rt_object_delete &rArr; rt_free &rArr; rt_sem_take &rArr; rt_ipc_list_suspend &rArr; rt_thread_suspend &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_delete
<LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_free
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_idle_entry
</UL>

<P><STRONG><a name="[102]"></a>rt_thread_idle_init</STRONG> (Thumb, 46 bytes, Stack size 24 bytes, idle.o(i.rt_thread_idle_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = rt_thread_idle_init &rArr; rt_thread_init &rArr; _rt_thread_init &rArr; rt_timer_init &rArr; rt_object_init &rArr; rt_exit_critical &rArr; rt_schedule
</UL>
<BR>[Calls]<UL><LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_startup
<LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_init
</UL>
<BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rtthread_startup
</UL>

<P><STRONG><a name="[103]"></a>rt_thread_init</STRONG> (Thumb, 56 bytes, Stack size 56 bytes, thread.o(i.rt_thread_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = rt_thread_init &rArr; _rt_thread_init &rArr; rt_timer_init &rArr; rt_object_init &rArr; rt_exit_critical &rArr; rt_schedule
</UL>
<BR>[Calls]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_init
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_rt_thread_init
</UL>
<BR>[Called By]<UL><LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_idle_init
</UL>

<P><STRONG><a name="[9b]"></a>rt_thread_mdelay</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, thread.o(i.rt_thread_mdelay))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = rt_thread_mdelay &rArr; rt_thread_sleep &rArr; rt_timer_start &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_tick_from_millisecond
<LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_sleep
</UL>
<BR>[Called By]<UL><LI><a href="#[45]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_gpio_and_delay
<LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nf_thread_entry
<LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;WS2812_thread_entry
<LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SW_thread_entry
<LI><a href="#[4a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LED_thread_entry
</UL>

<P><STRONG><a name="[e2]"></a>rt_thread_resume</STRONG> (Thumb, 60 bytes, Stack size 16 bytes, thread.o(i.rt_thread_resume))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = rt_thread_resume &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
<LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_stop
<LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_list_remove
<LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule_insert_thread
</UL>
<BR>[Called By]<UL><LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_startup
<LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_ipc_list_resume
</UL>

<P><STRONG><a name="[e8]"></a>rt_thread_self</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, thread.o(i.rt_thread_self))
<BR><BR>[Called By]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_mq_recv
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_startup
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_take
<LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_tick_increase
</UL>

<P><STRONG><a name="[105]"></a>rt_thread_sleep</STRONG> (Thumb, 60 bytes, Stack size 24 bytes, thread.o(i.rt_thread_sleep))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = rt_thread_sleep &rArr; rt_timer_start &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_start
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_control
<LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_suspend
<LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_mdelay
</UL>

<P><STRONG><a name="[d4]"></a>rt_thread_startup</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, thread.o(i.rt_thread_startup))
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = rt_thread_startup &rArr; rt_thread_resume &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_resume
<LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule
<LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_self
</UL>
<BR>[Called By]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;startup_thread
<LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_idle_init
<LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_application_init
</UL>

<P><STRONG><a name="[e4]"></a>rt_thread_suspend</STRONG> (Thumb, 66 bytes, Stack size 16 bytes, thread.o(i.rt_thread_suspend))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = rt_thread_suspend &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
<LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_stop
<LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule_remove_thread
</UL>
<BR>[Called By]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_ipc_list_suspend
<LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_sleep
</UL>

<P><STRONG><a name="[3f]"></a>rt_thread_timeout</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, thread.o(i.rt_thread_timeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = rt_thread_timeout &rArr; rt_schedule
</UL>
<BR>[Calls]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule
<LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_list_remove
<LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule_insert_thread
</UL>
<BR>[Address Reference Count : 1]<UL><LI> thread.o(i._rt_thread_init)
</UL>
<P><STRONG><a name="[108]"></a>rt_thread_yield</STRONG> (Thumb, 88 bytes, Stack size 16 bytes, thread.o(i.rt_thread_yield))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = rt_thread_yield &rArr; rt_schedule
</UL>
<BR>[Calls]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_schedule
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
<LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_list_remove
</UL>
<BR>[Called By]<UL><LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_tick_increase
</UL>

<P><STRONG><a name="[104]"></a>rt_tick_from_millisecond</STRONG> (Thumb, 50 bytes, Stack size 0 bytes, clock.o(i.rt_tick_from_millisecond))
<BR><BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_mdelay
</UL>

<P><STRONG><a name="[e9]"></a>rt_tick_get</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, clock.o(i.rt_tick_get))
<BR><BR>[Called By]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_mq_recv
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_start
<LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_check
</UL>

<P><STRONG><a name="[f5]"></a>rt_tick_increase</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, clock.o(i.rt_tick_increase))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = rt_tick_increase &rArr; rt_timer_check &rArr; rt_timer_start &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_check
<LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_yield
<LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_self
</UL>
<BR>[Called By]<UL><LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_os_tick_callback
</UL>

<P><STRONG><a name="[109]"></a>rt_timer_check</STRONG> (Thumb, 140 bytes, Stack size 32 bytes, timer.o(i.rt_timer_check))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = rt_timer_check &rArr; rt_timer_start &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_start
<LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_tick_get
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
<LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_list_remove
<LI><a href="#[10b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_list_isempty
<LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_list_insert_after
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_rt_timer_remove
</UL>
<BR>[Called By]<UL><LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_tick_increase
</UL>

<P><STRONG><a name="[ea]"></a>rt_timer_control</STRONG> (Thumb, 82 bytes, Stack size 16 bytes, timer.o(i.rt_timer_control))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = rt_timer_control
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_mq_recv
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_take
<LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_sleep
</UL>

<P><STRONG><a name="[fe]"></a>rt_timer_detach</STRONG> (Thumb, 40 bytes, Stack size 16 bytes, timer.o(i.rt_timer_detach))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = rt_timer_detach &rArr; rt_object_detach
</UL>
<BR>[Calls]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_detach
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_rt_timer_remove
</UL>
<BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_exit
</UL>

<P><STRONG><a name="[c0]"></a>rt_timer_init</STRONG> (Thumb, 42 bytes, Stack size 32 bytes, timer.o(i.rt_timer_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = rt_timer_init &rArr; rt_object_init &rArr; rt_exit_critical &rArr; rt_schedule
</UL>
<BR>[Calls]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_init
<LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_rt_timer_init
</UL>
<BR>[Called By]<UL><LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_rt_thread_init
</UL>

<P><STRONG><a name="[eb]"></a>rt_timer_start</STRONG> (Thumb, 194 bytes, Stack size 32 bytes, timer.o(i.rt_timer_start))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = rt_timer_start &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_tick_get
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
<LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_list_insert_after
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_rt_timer_remove
</UL>
<BR>[Called By]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_mq_recv
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_take
<LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_check
<LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_sleep
</UL>

<P><STRONG><a name="[107]"></a>rt_timer_stop</STRONG> (Thumb, 46 bytes, Stack size 16 bytes, timer.o(i.rt_timer_stop))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_rt_timer_remove
</UL>
<BR>[Called By]<UL><LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_suspend
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_resume
</UL>

<P><STRONG><a name="[67]"></a>rtthread_startup</STRONG> (Thumb, 42 bytes, Stack size 8 bytes, components.o(i.rtthread_startup))
<BR><BR>[Stack]<UL><LI>Max Depth = 224<LI>Call Chain = rtthread_startup &rArr; rt_application_init &rArr; rt_thread_create &rArr; rt_object_allocate &rArr; rt_malloc &rArr; rt_sem_take &rArr; rt_ipc_list_suspend &rArr; rt_thread_suspend &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_idle_init
<LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_system_timer_thread_init
<LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_system_timer_init
<LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_system_scheduler_start
<LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_system_scheduler_init
<LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_show_version
<LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_board_init
<LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_application_init
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[c8]"></a>startup_thread</STRONG> (Thumb, 124 bytes, Stack size 32 bytes, startup_thread.o(i.startup_thread))
<BR><BR>[Stack]<UL><LI>Max Depth = 232<LI>Call Chain = startup_thread &rArr; rt_thread_create &rArr; rt_object_allocate &rArr; rt_malloc &rArr; rt_sem_take &rArr; rt_ipc_list_suspend &rArr; rt_thread_suspend &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_startup
<LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_create
</UL>
<BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;$Super$$main
</UL>
<P>
<H3>
Local Symbols
</H3>
<P><STRONG><a name="[3a]"></a>SPI_DMAError</STRONG> (Thumb, 34 bytes, Stack size 8 bytes, stm32f1xx_hal_spi.o(i.SPI_DMAError))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SPI_DMAError
</UL>
<BR>[Calls]<UL><LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_ErrorCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_spi.o(i.HAL_SPI_Transmit_DMA)
</UL>
<P><STRONG><a name="[38]"></a>SPI_DMAHalfTransmitCplt</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, stm32f1xx_hal_spi.o(i.SPI_DMAHalfTransmitCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SPI_DMAHalfTransmitCplt
</UL>
<BR>[Calls]<UL><LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TxHalfCpltCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_spi.o(i.HAL_SPI_Transmit_DMA)
</UL>
<P><STRONG><a name="[39]"></a>SPI_DMATransmitCplt</STRONG> (Thumb, 100 bytes, Stack size 16 bytes, stm32f1xx_hal_spi.o(i.SPI_DMATransmitCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = SPI_DMATransmitCplt &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TxCpltCallback
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_ErrorCallback
<LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f1xx_hal_spi.o(i.HAL_SPI_Transmit_DMA)
</UL>
<P><STRONG><a name="[95]"></a>SPI_EndRxTransaction</STRONG> (Thumb, 112 bytes, Stack size 24 bytes, stm32f1xx_hal_spi.o(i.SPI_EndRxTransaction))
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = SPI_EndRxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Receive
</UL>

<P><STRONG><a name="[97]"></a>SPI_EndRxTxTransaction</STRONG> (Thumb, 68 bytes, Stack size 24 bytes, stm32f1xx_hal_spi.o(i.SPI_EndRxTxTransaction))
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = SPI_EndRxTxTransaction &rArr; SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Called By]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_TransmitReceive
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit
<LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitCplt
</UL>

<P><STRONG><a name="[ab]"></a>SPI_WaitFlagStateUntilTimeout</STRONG> (Thumb, 184 bytes, Stack size 32 bytes, stm32f1xx_hal_spi.o(i.SPI_WaitFlagStateUntilTimeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = SPI_WaitFlagStateUntilTimeout
</UL>
<BR>[Calls]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
<LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTransaction
</UL>

<P><STRONG><a name="[8d]"></a>RCC_Delay</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, stm32f1xx_hal_rcc.o(i.RCC_Delay))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = RCC_Delay
</UL>
<BR>[Called By]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
</UL>

<P><STRONG><a name="[81]"></a>DMA_SetConfig</STRONG> (Thumb, 44 bytes, Stack size 12 bytes, stm32f1xx_hal_dma.o(i.DMA_SetConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = DMA_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
</UL>

<P><STRONG><a name="[88]"></a>__NVIC_SetPriority</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, stm32f1xx_hal_cortex.o(i.__NVIC_SetPriority))
<BR><BR>[Called By]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SYSTICK_Config
</UL>

<P><STRONG><a name="[50]"></a>rti_board_end</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, components.o(i.rti_board_end))
<BR>[Address Reference Count : 1]<UL><LI> components.o(.rti_fn.1.end)
</UL>
<P><STRONG><a name="[4f]"></a>rti_board_start</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, components.o(i.rti_board_start))
<BR>[Address Reference Count : 1]<UL><LI> components.o(.rti_fn.0.end)
</UL>
<P><STRONG><a name="[51]"></a>rti_end</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, components.o(i.rti_end))
<BR>[Address Reference Count : 1]<UL><LI> components.o(.rti_fn.6.end)
</UL>
<P><STRONG><a name="[4e]"></a>rti_start</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, components.o(i.rti_start))
<BR>[Address Reference Count : 1]<UL><LI> components.o(.rti_fn.0)
</UL>
<P><STRONG><a name="[49]"></a>rt_thread_idle_entry</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, idle.o(i.rt_thread_idle_entry))
<BR><BR>[Stack]<UL><LI>Max Depth = 144 + In Cycle
<LI>Call Chain = rt_thread_idle_entry &rArr;  rt_thread_idle_entry (Cycle)
</UL>
<BR>[Calls]<UL><LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_idle_excute
<LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_idle_entry
</UL>
<BR>[Called By]<UL><LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_idle_entry
</UL>
<BR>[Address Reference Count : 1]<UL><LI> idle.o(i.rt_thread_idle_init)
</UL>
<P><STRONG><a name="[e1]"></a>rt_ipc_list_resume</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, ipc.o(i.rt_ipc_list_resume))
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = rt_ipc_list_resume &rArr; rt_thread_resume &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_resume
</UL>
<BR>[Called By]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_release
<LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_mq_recv
</UL>

<P><STRONG><a name="[e3]"></a>rt_ipc_list_suspend</STRONG> (Thumb, 92 bytes, Stack size 24 bytes, ipc.o(i.rt_ipc_list_suspend))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = rt_ipc_list_suspend &rArr; rt_thread_suspend &rArr; rt_timer_stop &rArr; _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_suspend
<LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_list_insert_before
</UL>
<BR>[Called By]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_mq_recv
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_take
</UL>

<P><STRONG><a name="[e5]"></a>rt_list_insert_before</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, ipc.o(i.rt_list_insert_before))
<BR><BR>[Called By]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_ipc_list_suspend
</UL>

<P><STRONG><a name="[ed]"></a>rt_list_isempty</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, ipc.o(i.rt_list_isempty))
<BR><BR>[Called By]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_sem_release
<LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_mq_recv
</UL>

<P><STRONG><a name="[da]"></a>plug_holes</STRONG> (Thumb, 80 bytes, Stack size 12 bytes, mem.o(i.plug_holes))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = plug_holes
</UL>
<BR>[Called By]<UL><LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_free
</UL>

<P><STRONG><a name="[f1]"></a>rt_list_insert_after</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, object.o(i.rt_list_insert_after))
<BR><BR>[Called By]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_init
<LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_allocate
</UL>

<P><STRONG><a name="[f3]"></a>rt_list_remove</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, object.o(i.rt_list_remove))
<BR><BR>[Called By]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_detach
<LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_object_delete
</UL>

<P><STRONG><a name="[bd]"></a>_rt_thread_init</STRONG> (Thumb, 110 bytes, Stack size 32 bytes, thread.o(i._rt_thread_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = _rt_thread_init &rArr; rt_timer_init &rArr; rt_object_init &rArr; rt_exit_critical &rArr; rt_schedule
</UL>
<BR>[Calls]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_memset
<LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_stack_init
<LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_init
</UL>
<BR>[Called By]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_create
<LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_init
</UL>

<P><STRONG><a name="[c3]"></a>_thread_cleanup_execute</STRONG> (Thumb, 28 bytes, Stack size 16 bytes, thread.o(i._thread_cleanup_execute))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = _thread_cleanup_execute
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_enable
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_hw_interrupt_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_exit
</UL>

<P><STRONG><a name="[100]"></a>rt_list_insert_after</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, thread.o(i.rt_list_insert_after))
<BR><BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_exit
</UL>

<P><STRONG><a name="[106]"></a>rt_list_remove</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, thread.o(i.rt_list_remove))
<BR><BR>[Called By]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_resume
<LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_yield
<LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_thread_timeout
</UL>

<P><STRONG><a name="[10c]"></a>_rt_timer_init</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, timer.o(i._rt_timer_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _rt_timer_init
</UL>
<BR>[Called By]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_init
</UL>

<P><STRONG><a name="[c1]"></a>_rt_timer_remove</STRONG> (Thumb, 24 bytes, Stack size 16 bytes, timer.o(i._rt_timer_remove))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = _rt_timer_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_list_remove
</UL>
<BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_start
<LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_check
<LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_stop
<LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_detach
</UL>

<P><STRONG><a name="[10a]"></a>rt_list_insert_after</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, timer.o(i.rt_list_insert_after))
<BR><BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_start
<LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_check
</UL>

<P><STRONG><a name="[10b]"></a>rt_list_isempty</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, timer.o(i.rt_list_isempty))
<BR><BR>[Called By]<UL><LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_check
</UL>

<P><STRONG><a name="[c2]"></a>rt_list_remove</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, timer.o(i.rt_list_remove))
<BR><BR>[Called By]<UL><LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rt_timer_check
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_rt_timer_remove
</UL>
<P>
<H3>
Undefined Global Symbols
</H3><HR></body></html>
